As the demand for ever-smaller silicon devices continues, and as resolution continues below the sub-micron level, the need for uniform and precise micromachining is increasing. The manufacture of semiconductor integrated circuits typically involves highly complex, time consuming and costly processes which, with continually narrower line width requirements, must be achieved with an ever increasing degree of precision. Within such processes the etching of semiconductor material (e.g., silicon) often entails the use of a chemical bath to which a patterned semiconductor material is exposed, so as to etch selectively certain portions of the surface of a wafer. In a typical chemical etch process, both the rate of etch and the selectivity of etch are parameters critical to the successful formation of an intended substrate geometry.
When the etchant is applied to the semiconductor material (e.g., silicon), the amount of etching performed is dependent upon the etch rate, the length of time the etchant is applied and other physical factors. The direction of the etch is determined by the degree to which the selected etching process is isotropic or anisotropic. Etching which proceeds in all directions at the same rate is said to be "isotropic." By definition, any etching that is not isotropic is anisotropic. The etching of structures from polysilicon requires a process having a high degree of selectivity and anisotropy, without damaging the structure being formed. The problem is exacerbated by the requirements of sub-micron geometries. Wet etching, for example, is isotropic. Many etching processes typically fall between the extremes of being isotropic and completely anisotropic and, therefore, some unwanted etching is common even under the best conditions of prior etching processes.
Another solution is to make an isotropic etchant "selective." An etching process may be made "selective" to one surface over another based upon a variety of characteristics of the material being etched. These characteristics are termed "etch rate varying characteristics" and include, but are not limited to, chemical composition, the ratio of the etchant components, dopant levels, density, post-deposition annealing conditions, deposition temperature and deposition pressure. By making an etching process or etchant "selective" to a particular surface or composition, the process or etchant will etch that particular surface or composition less rapidly than the surrounding surface or other material with which the etchant may come into contact. Accordingly, when an etchant is selective for a heavily doped material such as heavily boron doped BPSG, the etchant will etch layers of material containing heavily boron doped BPSG less quickly than other layers not similarly composed.
Various etching techniques and compositions have been used in the fabrication of semiconductor integrated circuits. For example, U.S. Pat. No. 3,677,848 (Irwin et al.) describes an etching method which immerses a semiconductor body into a mixture of hydrofluoric acid, nitric acid, acetic acid and either sodium chlorite or sodium nitrite. The patent describes that the mixture will etch a silicon or germanium body at a rate of 0.00033 to 0.001 inch/minute. However, the mixture does not have any selectivity to different parts of the silicon or germanium body.
U.S. Pat. No. 4,026,733 (Owen, III et al.) describes a process for defining polycrystalline silicon patterns from a masking member. The patent describes that self-limiting etching of the silicon is achieved through an etchant that discriminates between doped and undoped silicon. The selective etchant solution of the '733 patent includes hydrofluoric acid, nitric acid and acetic acid.
U.S. Pat. No. 4,142,926 (Morgan) describes a process for fabricating a double layer polycrystalline silicon structure for a metal-oxide-semiconductor (MOS) integrated circuit by employing a selective etchant which discriminates between silicon layers. The '926 patent recites that the selective etching solution includes hydrofluoric acid, nitric acid and acetic acid and selectively etches phosphorous doped polycrystalline silicon.
U.S. Pat. No. 4,681,657 (Hwang et al.) describes an etchant composition and method for resistivity specific etching of doped silicon films which overlie intrinsic or lightly doped crystal regions. The etching method includes contacting a semiconductor body with a mixture of hydrofluoric acid, nitric acid and predominantly acetic acid/water mixture.
U.S. Pat. No. 5,532,182 (Woo) describes a process for fabricating stacked DRAM capacitors. The patent describes an etching solution including nitric acid, acetic acid, hydrofluoric acid and deionized water in a ratio of from 30:3:0.5:15 to 30:3:1:15.5 to selectively etched doped silicon.
U.S. Pat. No. 5,637,523 (Fazan et al.) describes a method of forming a capacitor. The patent recites that an etching solution including 0.7% of hydrofluoric acid, 50 to 54% nitric acid and 2.6% acetic acid selectively etched doped polycrystalline silicon. Additionally, the patent describes a selective etching solution including 0.53% HF, 37.63% HNO.sub.3, 22.58% CH.sub.3 COOH and 4.21% NH.sub.4 F with the remainder deionized water achieved a selectivity of greater than 3:1 undoped to doped silicon.
As discussed above, these proposed solutions and additional proposed solutions have been attempted to selectively etch semiconductor materials in the manufacture of integrated circuits with high selectivity. These additional attempts include using anisotropic etchants, tailoring the chemical concentrations of known isotropic etching solutions, and tailoring the physical environments of etching apparatus. However, these prior methods have not provided an etching composition and method having a high selectivity.